This invention relates in general to integrated circuit ("IC") packages and in particular, to high performance IC packages.
Ongoing design goals for integrated circuits include increasing their density, functionality, and speed. To achieve these goals, new design tools, process equipment, and test equipment continue to be developed. As a result, the performance and in particular, the density, functionality, and speed of integrated circuits continues to increase dramatically.
Such advances in integrated circuit performance, however, may be wasted unless parallel developments in packaging technology occur. In particular, as the density and functionality of integrated circuits increase, the density and number of package pins required for the integrated circuit to communicate with other electronic devices increases, and as the speed of the signals being communicated through those increased number of package pins increases, parasitic noise generated from various electrical paths connecting the integrated circuit to the increased number of package pins also increases, and such increased noise may result in spurious logic errors.
FIGS. 1-4 illustrate, as an example, various views of a conventional plastic pin grid array ("PPGA") package 10. The PPGA package 10 includes a plastic package body 11 having a cavity area 14 housing an integrated circuit 13. The integrated circuit 13 is electrically connected to an array of pins 12 extending out of a bottom surface 21 of the package body 11, by bonding wires 15 which connect bond pads 17 formed on the integrated circuit 13 to respective contact fingers 18 formed upon first and second ledge areas, 19 and 20, which in turn, connect through metallic layers 22 to their respective pins 12. A ceramic lid 22 is attached to the bottom surface 21 of the package body 11 to protect and encase the integrated circuit 13 within the cavity area 14.